Processes for protecting data through encryption/decryption have, at the present time, become crucial, due to the growing increase in data exchanges of all types, and to the increasingly widespread use of high-power computing means, which can give less scrupulous individuals unauthorized access to data passing through a network. In order to deal with the acuteness of the aforementioned problems, the technical solutions developed to date have proposed cryptographic products produced in the form of integrated circuits, for example of the ASIC or FPGA type. Each circuit of this type is produced for purposes of a clearly defined application, for example the processing of a given protocol, and does not make it possible to implement several types of protocols. In any case, at the moment these components cannot be implemented in a cryptographic system with a modular architecture. In fact, one of the drawbacks of these components is that information on the detailed architecture is not available, making it impossible to implement the architecture in different types of technology. The algorithms of these components are not available and do not allow said components to be used in applications for protecting critical national and European infrastructures. Moreover, these ASIC or FPGA-type components do not have a reprogrammable part that makes it possible to adjust the encryption protocol implemented in said component based on the type of communication used. Furthermore, the security level of these components is often insufficient, or even nonexistent, said components having no separation of unencrypted and encrypted data flows. These components are not capable of handling constraints such as having secure key memories, managing alarms, or performing continuous tests for proper operation. There are other components offering higher levels of security, such as Motorola's AIM components. However, they are simple cryptographic components of medium speed, less than 100 Mb/s, whose level of performance is not adjustable to the required speed (for example 1 Gb/s) and which do not handle protocol processing. A modular cryptographic system using these standard components would be an expensive and very bulky product, for which no customized development of a PFGA or ASIC solution would be possible. Lastly, these components cannot be adapted to different types of external interfaces (PCI, PCI Express, SPI, etc.) without reworking the overall architecture.